1. Field of the Invention
The present invention relates to a semiconductor device including an n-channel MIS (metal-insulator semiconductor) transistor and a p-channel MIS transistor formed on the same substrate, as well as a method of manufacturing such a device.
2. Description of the Related Art
The drastic improvements of the performance of CMOS circuits have been achieved by micro-fabricating MOSFET based on the scaling rule. However, at present, where there has been a breakthrough where the gate length is 50 nm or less, various problems innate to the micro-fabrication are becoming prominent. Under these circumstances, it is essential for a further improvement of the performance of the CMOS circuit to create a technique of increasing the mobility of channels. In order to enhance the mobility of channels, there have been proposed a method of applying strain to Si that forms a channel or a method of using SiGe (or Ge) for a channel.
The method of applying strain to Si is mainly divided into two categories, one is that Si is formed by epitaxial growth on lattice-relaxed SiGe, and another is that a nitride film that creates stress is deposited on a transistor. The former is a method in which biaxial tensile strain is applied to Si, whereas the latter is a method in which uniaxial tensile strain is applied in the gate length direction. Both of these methods are effective for increasing the mobility of nMOSFET. However, the above-described strain application entails such a drawback that the increase in mobility of pMOSFET is small or substantially none.
There have been attempts over a long period to increase the mobility of pMOSFET by using biaxial compression-strained SiGe (or Ge) for the channel material. Based on this idea, there has been proposed a CMOS structure in which strained Si is used for the channel of nMOSFET and strained SiGe is used for the channel of pMOSFET (in Jpn. Pat. Appln. KOKAI Publication No. 2001-160594). However, with a SiGe material having biaxial compression strain, a sufficiently increase in mobility, for example, about two times as much, cannot be obtained if the Ge composition is less than 50%. Further, the use of a high Ge-concentration channel poses a number of problems in terms of separation formation from that of nMOSFET, crystal defect, leak current, interfacial characteristics of gate insulation film, compatibility with an already-existing Si-LSI process, etc.
As described above, the conventional CMOS structure in which the mobility is improved by lattice strain, still entails such a drawback that a sufficient increase in mobility cannot be obtained for both of the n and p transistors unless the Ge composition is increased and large strain is applied.